1. Field
Embodiments of the present invention generally relate to semiconductor testing.
2. Description of the Related Art
Testing is an important step in the fabrication of semiconductor devices. Typically, partially or fully completed semiconductor devices are tested by bringing terminals disposed on an upper surface of a device to be tested—also referred to as a device under test (or DUT)—into contact with probes, for example, as contained in a probe card assembly, as part of a test system. An important aspect of such testing is the alignment between the probes of the probe card assembly and the terminals of the DUT.
Typically, this is accomplished within a test system by locating the position of several randomly selected tips of the probes using, for example, a camera and performing a best fit calculation to determine the position of the probe card assembly within the test system. However, such alignment techniques rely on a statistically insignificant sampling of a few probes out of, typically, hundreds, thousands, or tens of thousands. Therefore, local tip position variation may lead to poor global alignment of the probe card assembly. This problem may be amplified in large area array probe card assemblies. Also, in instances where tip positions are selected that are grouped near the center of the probe array, any misalignment due to such local tip position variation may further be undesirably amplified.
Moreover, as the size of features formed on the DUT continue to be reduced, and/or spaced more closely together, greater numbers of probes may be disposed on the probe card and/or may be more closely spaced together, thereby requiring more precise alignment between the probes and the terminals of the DUT.
One solution to the above problem could be to program the test system to look at more tips of the probes to improve the statistical sample size. However, such a solution would undesirably increase the amount of time required to locate and align the probe card assembly within the test system, thereby reducing test system uptime and testing throughput.
Therefore, there is a need for an improved apparatus and methods for aligning a probe card assembly with a device under test in a test system.